Semi-conductor Devices and Electronics
13.0 Logic gates
13.0 Logic gates
A digital circuit with one or more input signals but only one output signal is known as logic gate.
The logic gates are the building blocks of a digital system. Each logic gate follows a certain logical relationship between input and output voltage.
There are three basic logic gates,
- OR gate
- AND gate
- NOT gate
Truth table
It is a table that shows all possible input combinations and the corresponding output combinations for a logic gate.
13.1 OR gate
An OR gate has two or more inputs but only one output.
It is called OR gate because the output is high if any or all the inputs are high.
The logic symbol of OR gate is as shown below.
The truth table for OR gate is,
Input | Output | |
$A$ | $B$ | $Y$ |
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 1 |
The boolean expression for OR gate is,
$$Y = A + B$$
13.2 AND gate
An AND gate has two or more inputs but only one output.
It is called AND gate because output is high only when all the inputs are high.
The logic symbol of AND gate is as shown below.
The truth table for AND gate is,
Input | Output | |
$A$ | $B$ | $Y$ |
0 | 0 | 0 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
The boolean expression for AND gate is,
$$Y = A \cdot B$$
13.3 NOT gate
The NOT gate is the simplest of all logic gates. It has only one input and one output.
NOT gate is also called inverter because it inverts the input.
The logic symbol of NOT gate is as shown below.
The truth table for NOT gate is,
Input | Output |
$A$ | $Y$ |
0 | 1 |
1 | 0 |
The boolean expression for AND gate is,
$$Y = \overline A $$
13.4 NAND gate
It is an AND gate followed by a NOT gate.
The logic symbol of NAND gate is as shown below.
The truth table for NAND gate is,
Input | Output | |
$A$ | $B$ | $Y$ |
0 | 0 | 1 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |
The boolean expression for NAND gate is,
$$Y = \overline {A \cdot B} $$
13.5 NOR gate
It is an OR gate followed by a NOT gate.
The logic symbol of NOR gate is as shown below.
The truth table for NOR gate is,
Input | Output | |
$A$ | $B$ | $Y$ |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 0 |
The boolean expression for NOR gate is,
$$Y = \overline {A + B} $$
13.6 XOR gate
It is also known as Exclusive OR gate.
The logic symbol of XOR gate is as shown below.
The truth table for XOR gate is,
Input | Output | |
$A$ | $B$ | $Y$ |
0 | 0 | 0 |
0 | 1 | 1 |
1 | 0 | 1 |
1 | 1 | 0 |
The boolean expression for XOR gate is,
$$\begin{equation} \begin{aligned} Y = \overline A \cdot B + A \cdot \overline B \\ Y = A \oplus B \\\end{aligned} \end{equation} $$
13.7 XNOR gate
It is also known as Exclusive NOR gate.
The logic symbol of XNOR gate is as shown below.
The truth table for XNOR gate is,
Input | Output | |
$A$ | $B$ | $Y$ |
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
The boolean expression for XNOR gate is,
$$\begin{equation} \begin{aligned} Y = A \cdot B + \overline A \cdot \overline B \\ Y = \overline {A \oplus B} \\\end{aligned} \end{equation} $$
13.8 NAND as a universal gate
NAND gate is called as universal gate because with the repeated use of NAND gate we can construct any basic gate.
NOT gate from NAND gate
$$Y = \overline A $$
13.8.1 AND gate from NAND gate
$$\begin{equation} \begin{aligned} Y = \overline {\overline {A \cdot B} } \\ Y = A \cdot B \\\end{aligned} \end{equation} $$
13.8.2 OR gate from NAND gate
$$\begin{equation} \begin{aligned} Y = \overline {\overline A \cdot \overline B } \\ Y = \overline {\overline A } + \overline {\overline B } \\ Y = A + B \\\end{aligned} \end{equation} $$
13.9 NOR as a universal gate
NOR gate is called as universal gate because with the repeated use of NOR gate we can construct any basic gate.
NOT gate from NOR gate
$$Y = \overline A $$
13.9.1 AND gate from NOR gate
$$\begin{equation} \begin{aligned} Y = \overline {\overline A + \overline B } \\ Y = \overline {\overline A } \cdot \overline {\overline B } \\ Y = A \cdot B \\\end{aligned} \end{equation} $$
13.9.2 OR gate from NOR gate
$$\begin{equation} \begin{aligned} Y = \overline {\overline {A + B} } \\ Y = A + B \\\end{aligned} \end{equation} $$